Display Clock Divider
- group x3ep_Display_Clock_Divider
Defines
-
DISPLAY_CLOCK_DIV_1 ((uint16_t)0x0)
Display clock divider is set to 1.
-
DISPLAY_CLOCK_DIV_2 ((uint16_t)0x1)
Display clock divider is set to 2.
-
DISPLAY_CLOCK_DIV_4 ((uint16_t)0x2)
Display clock divider is set to 4.
-
DISPLAY_CLOCK_DIV_8 ((uint16_t)0x3)
Display clock divider is set to 8.
-
DISPLAY_CLOCK_DIV_16 ((uint16_t)0x4)
Display clock divider is set to 16.
-
DISPLAY_CLOCK_DIV_32 ((uint16_t)0x5)
Display clock divider is set to 32.
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DISPLAY_CLOCK_DIV_40 ((uint16_t)0x6)
Display clock divider is set to 40.
-
DISPLAY_CLOCK_DIV_64 ((uint16_t)0x7)
Display clock divider is set to 64.
-
IS_DISPLAY_DIV(DIV) (((DIV) == DISPLAY_CLOCK_DIV_1
) || \
((DIV) ==
DISPLAY_CLOCK_DIV_2) || \
((DIV) ==
DISPLAY_CLOCK_DIV_4) || \
((DIV) ==
DISPLAY_CLOCK_DIV_8) || \
((DIV) ==
DISPLAY_CLOCK_DIV_16) || \
((DIV) ==
DISPLAY_CLOCK_DIV_32) || \
((DIV) ==
DISPLAY_CLOCK_DIV_40) || \
((DIV) ==
DISPLAY_CLOCK_DIV_64)) Check if the input parameter is valid.
-
DISPLAY_CLOCK_DIV_1 ((uint16_t)0x0)