I2S Clear Interrupt Definition

group I2S_Clear_Interrupt_Definition

Defines

I2S_CLEAR_INT_TX_VALID BIT14

Clear the I2S interrupt for TX valid.

I2S_CLEAR_INT_TX_IDLE BIT6

Clear the I2S interrupt for TX is working, but FIFO_0 is empty.

I2S_CLEAR_INT_RF_EMPTY BIT5

Clear the I2S interrupt for RX FIFO_0 is empty (MIC path).

I2S_CLEAR_INT_TF_EMPTY BIT4

Clear the I2S interrupt for TX FIFO_0 is empty (SPK path).

I2S_CLEAR_INT_RF_FULL BIT3

Clear the I2S interrupt for RX FIFO_0 is full (MIC path).

I2S_CLEAR_INT_TF_FULL BIT2

Clear the I2S interrupt for TX FIFO_0 is full (SPK path).

I2S_CLEAR_INT_RX_READY BIT1

Clear the I2S interrupt is ready to receive data (MIC path).

I2S_CLEAR_INT_TX_READY BIT0

Clear the I2S interrupt is ready to send data out (SPK path).

IS_I2S_CLEAR_INT(CLEAR)                                           (((CLEAR) == I2S_CLEAR_INT_RX_READY

) || \

((CLEAR) ==

I2S_CLEAR_INT_TX_READY

) || \

((CLEAR) ==

I2S_CLEAR_INT_RX_READY

) || \

((CLEAR) ==

I2S_CLEAR_INT_TX_READY))