AON QDEC

Sample List

This chapter introduces the details of the AON QDEC sample. The RTL87x2G provides the following samples for the AON QDEC peripheral.

Functional Overview

As shown in the following figure, AON QDEC is used to detect the motion state of the rotation-sensing device. When the rotating device moves, it will output two quadrature signals PHA and PHB. AON QDEC judges the direction of rotation by detecting the phase change of PHA and PHB.

../../../../../_images/Schematic_Diagram_of_Two_Quadrature_Signals_of_QDEC.jpg

Schematic Diagram of Two Quadrature Signals of AON QDEC

Feature List

  • Support 1 independent axis.

  • Support hardware debounce.

  • 16-bits ACC counter.

  • Support wakeup function.

Direction Judgment and Counting Method

  1. PHA and PHB are combined into a 2-bit number. PHA is the high bit, and PHB is the low bit.

  2. The phases are divided into four types: 00, 01, 11, and 10.

  3. As shown in the following figure, changes in the order of 00, 01, 11, and 10 are defined as positive. When the counter scale is set to 0, the counter will increase by one when the phase changes once. When the counter scale is set to 1, the counter will increase by one when the phase changes twice.

  4. Changes in the order of 00, 10, 11, and 01 are defined as negative. When the counter scale is set to 0, the counter will decrease by one when the phase changes once. When the counter scale is set to 1, the counter will decrease by one when the phase changes twice.

  5. PHA and PHB should only have one signal change at a time. If both signals change at the same time, the state is considered wrong. When this error state occurs, the counter does not count. Illegal interrupts can be turned on to detect this error condition.

  6. When the counter value is 0x0000, the device rotates in reverse (counter value decreases by 1), causing the counter to underflow and become 0xFFFF, while setting the AON_QDEC_FLAG_UNDERFLOW_X flag to 1.

  7. When the counter value is 0xFFFF, the device rotates forward (counter value increases by 1), causing the counter to overflow and become 0x0000, while setting the AON_QDEC_FLAG_OVERFLOW_X flag to 1.

../../../../../_images/Schematic_Diagram_of_QDEC_Direction_Judgment.jpg

Schematic Diagram of AON QDEC Direction Judgment