IR GDMA Receive
This sample demonstrates how to use GDMA to receive IR data.
Use the P2_6 pin as the PWM output pin to output a PWM waveform for simulating the transmitter data. Connect the PWM output pin to the IR input pin.
IR data is received via GDMA, and upon reaching the specified amount, a GDMA interrupt is triggered.
Requirements
For requirements, please refer to the Requirements.
Wiring
Connect PWM output pin P2_6 and IR receiver pin P2_5.
Configurations
-
The following macro can be configured to modify the pin definitions.
#define IR_RX_PIN P2_5 #define PWM_OUT_PIN P2_6
-
The following macros can be configured to modify PWM configuration information.
#define PWM_HIGH_COUNT (20000 - 1) #define PWM_LOW_COUNT (20000 - 1)
Building and Downloading
For building and downloading, please refer to the Building and Downloading.
Experimental Verification
After initialization is complete, the PWM begins to output waveforms. The duration of the high level and low level are determined by the number of 40 MHz cycles specified by
PWM_HIGH_COUNT
andPWM_LOW_COUNT
, which is the same as the sampling frequency set for IR at 40 MHz.-
When the IR receives data, the GDMA transfers the IR data to memory. Once the GDMA completes the transfer of IR data, it triggers a GDMA interrupt. Within the GDMA interrupt function, the length and content of the transferred data are printed.
io_handle_gdma_msg: IR_GDMA_Rev_Data_Len = 80 io_handle_gdma_msg: GDMA_Recv_Buf[0] = 0x00004e1e io_handle_gdma_msg: GDMA_Recv_Buf[1] = 0x80004e1f io_handle_gdma_msg: GDMA_Recv_Buf[2] = 0x00004e1f io_handle_gdma_msg: GDMA_Recv_Buf[3] = 0x80004e1f ... io_handle_gdma_msg: GDMA_Recv_Buf[78] = 0x00004e1f io_handle_gdma_msg: GDMA_Recv_Buf[79] = 0x80004e1f ...
Note
0x00004e1f represents the number of cycles for IR reception at a low level, corresponding to the PWM_LOW_COUNT
value. 0x80004e1f represents the number of cycles for IR reception at a high level, where 0x4e1f corresponds to the PWM_HIGH_COUNT
value of PWM, and 0x80000000 represents the high level.
Code Overview
This section introduces the code and process description for initialization and corresponding function implementation in the sample.
Source Code Directory
The directory for project file and source code are as follows:
Project directory:
sdk\samples\peripheral\ir\rx+gdma\proj
Source code directory:
sdk\samples\peripheral\ir\rx+gdma\src
Initialization
The initialization flow for peripherals can refer to Initialization Flow in General Introduction.
-
Call
Pad_Config()
andPinmux_Config()
to configure the PAD and PINMUX of the corresponding pins.void board_ir_init(void) { Pad_Config(IR_RX_PIN, PAD_PINMUX_MODE, PAD_IS_PWRON, PAD_PULL_UP, PAD_OUT_DISABLE, PAD_OUT_LOW); Pad_PullConfigValue(IR_RX_PIN, PAD_PULL_STRONG); Pinmux_Config(IR_RX_PIN, IRDA_RX); } void board_pwm_init(void) { Pad_Config(PWM_OUT_PIN, PAD_PINMUX_MODE, PAD_IS_PWRON, PAD_PULL_NONE, PAD_OUT_ENABLE, PAD_OUT_HIGH); /* Normal mode */ Pinmux_Config(PWM_OUT_PIN, PWM_OUT_PINMUX); }
Call
RCC_PeriphClockCmd()
to enable the IR clock.-
Initialize the IR peripheral:
Define the
IR_InitTypeDef
typeIR_InitStruct
, and callIR_StructInit()
to pre-fillIR_InitStruct
with default values.Modify the
IR_InitStruct
parameters as needed. The IR initialization parameter configuration is shown in the table below.Call
IR_Init()
to initialize the IR peripheral.
IR Hardware Parameters |
Setting in the |
IR |
---|---|---|
Sample Clock |
40000000 |
|
IR Mode |
||
IR Rx Mode |
||
IR Rx Trigger Mode |
||
IR Rx GDMA Enable |
||
IR Rx Waterlevel |
4 |
Call
IR_Cmd()
to enable the IR peripheral.Call
RCC_PeriphClockCmd()
to enable the TIM clock.-
Initialize the TIM peripheral:
Define the
TIM_TimeBaseInitTypeDef
typeTIM_InitStruct
, and callTIM_StructInit()
to pre-fillIR_InitStruct
with default values.Modify the
TIM_InitStruct
parameters as needed. The TIM initialization parameter configuration is shown in the table below.Call
TIM_TimeBaseInit()
to initialize the TIM peripheral.Call
TIM_Cmd()
to enable the TIM peripheral.
TIM Hardware Parameters |
Setting in the |
TIM |
---|---|---|
TIM Mode |
||
PWM Enable |
||
PWM High Count |
|
|
PWM Low Count |
|
Call
RCC_PeriphClockCmd()
to enable the GDMA clock.-
Initialize the GDMA peripheral:
Define a
GDMA_InitTypeDef
typeGDMA_InitStruct
, and callGDMA_StructInit()
to pre-fillGDMA_InitStruct
with default values.Modify the
GDMA_InitStruct
parameters as needed. The initialization parameters for the GDMA channel are configured as shown in the table below. CallGDMA_Init()
to initialize the GDMA peripheral.Configure the GDMA total transfer complete interrupt
GDMA_INT_Transfer
and NVIC. For NVIC configurations, refer to Interrupt Configuration.Call
GDMA_Cmd()
to enable the corresponding GDMA channel transfer.
GDMA Hardware Parameters |
Setting in the |
GDMA Channel |
---|---|---|
Channel Num |
1 |
|
Transfer Direction |
||
Buffer Size |
80 |
|
Source Address Increment or Decrement |
||
Destination Address Increment or Decrement |
||
Source Data Size |
||
Destination Data Size |
||
Source Burst Transaction Length |
||
Destination Burst Transaction Length |
||
Source Address |
|
|
Destination Address |
|
|
Source Handshake |
Functional Implementation
After enabling the TIM peripheral, TIM starts outputting a PWM waveform. Once the IR receives data, it transfers the data from
(&IR->IR_RX_FIFO)
toGDMA_Recv_Buf
.-
When GDMA completes the data transfer, it triggers the
GDMA_INT_Transfer
interrupt. Within the interrupt function, the received data is printed, and the GDMA is re-enabled to continue transferring.void IO_TEST_GDMA_Channel_Handler(void) { GDMA_INTConfig(IO_TEST_GDMA_CHANNEL_MUM, GDMA_INT_Transfer, DISABLE); GDMA_Cmd(IO_TEST_GDMA_CHANNEL_MUM, DISABLE); IR_GDMA_Rev_Data_Len = IO_TEST_GDMA_TRANSFER_SIZE; io_handle_gdma_msg(); GDMA_ClearINTPendingBit(IO_TEST_GDMA_CHANNEL_MUM, GDMA_INT_Transfer); GDMA_Cmd(IO_TEST_GDMA_CHANNEL_MUM, ENABLE); GDMA_INTConfig(IO_TEST_GDMA_CHANNEL_MUM, GDMA_INT_Transfer, ENABLE); } void io_handle_gdma_msg(void) { DBG_DIRECT("io_handle_gdma_msg: IR_GDMA_Rev_Data_Len = %d \r\n", IR_GDMA_Rev_Data_Len); for (uint32_t i = 0; i < IR_GDMA_Rev_Data_Len; i++) { DBG_DIRECT("io_handle_gdma_msg: GDMA_Recv_Buf[%d] = 0x%x \r\n", i, GDMA_Recv_Buf[i]); } }
See Also
Please refer to the relevant API Reference: